asteralabs · San Jose, California, United States
Skills: Python
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Job Description We are looking for Principal Digital Design Engineers with experience developing micro-architecture and implementation of the front-end circuit design, including RTL, synthesis, IP integration, and block-level verification for high performance network controllers. The candidate must have good knowledge of communication/interface protocols such as PCI-Express (Gen-3 and above), Ualink, Esun, Ethernet etc. Basic Qualifications: Strong academic and technical background in electr …truncated… and supervision. Entrepreneurial, open-mind behavior and can-do attitude. Think and act fast with the customer in mind! Authorized to work in the US and start immediately. Required Experience: Hands-on, thorough knowledge of high-speed protocols like PCIe, Ualink, Esun, Ethernet, etc. Proven front end design expertise – architecture, RTL, simulations, synthesis, timing closure, GLS, DFT etc. Full chip or block level ownership from architecture to GDS, driving multiple complex designs to production Experience with Synopsys and/or Cadence digital design tools/flows Good knowledge of design for test (DFT), stuck-at and transition scan test insertion Familiarity with UVM based design verification Silicon b…
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