Astera Labs · San Jose, CA
Skills: Python
Design Verification Engineer Intern Astera Labs · San Jose, CA · Internship · On-site About Astera Labs Astera Labs builds connectivity solutions that help power modern AI infrastructure. Our Hardware Engineering teams design and validate high-performance products that connect processors, accelerators, memory, and network fabrics. The opportunity Join the Design Verification team and help validate digital designs before and after silicon. You’ll learn the team’s verification flow, develop and run tests, analyze simulations and waveforms, and contribute to the regressions and coverage that help ensure products behave as intended. This internship is designed for someone who enjoys understanding how a design should work, creating experiments that exercise it, and investigating the evidence when results differ from expectations. You’ll work with experienced verification and design engineers on a meaningful project with visible product impact, while building practical skills in digital design verification and semiconductor development. What you’ll do Learn the product domain, assigned project, verification environment, test flow, and tools needed to contribute effectively. Read specifications and design documentation to understand functionality, interfaces, corner cases, and verification requirements. Develop or extend simulation tests and verification components under engineering guidance, using SystemVerilog, UVM-style methodologies, Python, or related tools. Run simulations and regressions in a Linux environment using the team’s submission scripts, workspace setup, and test definitions. Analyze test logs, errors, assertions, and simulation output to identify failures and determine whether the issue is in the test, environment, design, or infrastructure. Use waveform-debug tools such as Verdi or DVE to inspect signal behavior and explain the sequence of events leading to a failure. Add or update tests, test definitions, regression lists, manifests, and supporting scrip…
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