Astera Labs · Toronto, Ontario, Canada
Skills: Python
Physical Design Engineer Intern (Toronto) Location: Toronto, Ontario, Canada Employment type: Internship About Astera Labs Astera Labs develops purpose-built connectivity solutions for rack-scale AI infrastructure. Our Intelligent Connectivity Platform brings together high-performance connectivity technologies for AI, cloud, server, and networking systems. The role As a Physical Design Engineer Intern in Toronto, you will gain hands-on experience taking a digital-design block through the physical-design flow, from RTL handoff and synthesis through floorplanning, placement, clock-tree synthesis, routing, timing closure, and signoff. You will read tool reports, debug flow issues, analyze power, performance, and area, and work with engineers across the ASIC implementation lifecycle. This internship is an opportunity to build practical VLSI and backend-design skills while learning how physical implementation decisions affect timing, congestion, power integrity, reliability, and manufacturability. What you’ll do Set up and run physical-design flow stages for a block using established methodologies and reproducible work areas. Review RTL and physical-design inputs, including netlists, constraints, technology files, libraries, and parasitic or extraction data. Support synthesis, floorplanning, power-grid planning, placement, clock-tree synthesis, routing, and implementation optimization. Analyze timing reports, slack, skew, transition, congestion, utilization, and other quality-of-results metrics. Help investigate setup and hold violations and evaluate fixes such as cell sizing, buffering, Vt swaps, useful skew, and routing optimization. Review physical-verification and power-integrity results, including DRC, LVS, antenna, electromigration, and IR-drop findings. Use Unix/Linux and Tcl or other scripting tools to automate runs, parse reports, compare experiments, and improve flow reproducibility. Debug tool errors, warnings, broken stages, and unexpected QoR changes by exam…
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