tenstorrent · Austin, Texas, United States; Toronto, Ontario, Canada
Skills: Python
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are designing AI hardware that pushes the limits of performance, power efficiency, and scalability. This role focuses on implementing parameterized RTL designs, improving architectural and micro-architectural efficiency, and optimizing for performance, power, and area. You’ll collaborate with architects, designers, and software teams to deliver high-performance AI IP. This role is hybrid based out of Toronto, ON or Austin, TX. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. What We Need Implement parameterized RTL designs based on detailed micro-architecture specifications. Run synthesis, timing, and power experiments to evaluate and refine designs. Enhance RTL design environments, tools, and supporting infrastructure. Collaborate with architects to improve performance, power, and area (PPA) across designs. What You Bring A Bachelor’s degree in EE/ECE/CE/CS or a related field (MS or PhD preferred). Strong foundational experience in RTL design with a focus on power- and area-efficient architectures. An understanding of microprocessor architecture, logic design principles, and their timing/power tradeoffs. Proficiency in Python and C/C++ for design automation and low-level…
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